Language Breakdown
Lines of code distribution across 18 owned repositories
1.6M
Total LOC
Verilog
608,634 lines
39.2%
N/A
XSLT
229,331 lines
14.8%
N/A
VHDL
208,055 lines
13.4%
N/A
Shell
170,069 lines
10.9%
N/A
Tcl
105,884 lines
6.8%
N/A
Other
231,238 lines
14.9%
N/A
T
T-Shaped Developer
T-shapedDeep in Verilog with broad versatility
Verilog
XSLT
VHDL
Shell
Tcl
Collaboration Network
Global Impact visualization
Repos
19
PRs
0
Growth
+18%
Top Collaborators
No collaborator data yet.
Coding Streak
Contribution activity over the past year
0 days
0
Contributions
0
Commits
0
Pull Requests
Jun
Jul
Aug
Sep
Oct
Nov
Dec
Jan
Feb
Mar
Apr
May
Jun
Mo
We
Fr
Based on GitHub activity
Less
More
Following
9 total
杨培文 (Yang Peiwen)
@ypwhs
ethanyuxinzhang
@ethanyuxinzhang
Wu Ti
@wuti324
lihangfeng
@lihangfeng
Yang Xu
@MagicXY
Synced via GitHub
Top Repositories
ynotebackparsing
有道云笔记5.x版本ynt备份文件解析
27
8
Python
creditcardinterestrate
计算信用卡分期手续费的等值年化贷款利率.
4
0
Python
DTMF-Detect-Matlab
3
2
MATLAB
zedboard_xilinux
How to boot ubuntu in zedboard RevC.(Not tested on revD)
3
1
Verilog
ZedBoardCourse
ZedBoard Course supported by Xilinx PAE Java Lu
3
1
Verilog
dnn-classification-learning
1
0
Jupyter Notebook
SEUWlanAutoLogin
1
0
C#
WinRotateScreen
Rotate Screen on Windows Platform.
1
1
C#
Atyls-VDMA-one-in-one-out
Digilent Atyls using Video DMA to read video from DVI and output to a sink
1
0
C
Kinect-Robot-Control
Southeast Univ. Ins School National Student Research Training Project Leaded by ZhangZhe.
1
1
C#
Open Source Impact
Contributions to external projects
0 merged PRs
No external contributions found.